Deck 10: Memory Management and Address Translation in Operating Systems

Question 1

In a virtual memory system , ________.

A) each virtual address space is much smaller than the real address space
B) determining how to map virtual addresses to physical addresses is of great importance
C) MMUs convert physical addresses to virtual addresses during execution
D) when the system is ready to run a process, the system loads the process's code and data from main memory into cache

Answer 1

B

Question 2

Systems that use dynamic address translation exhibit ________-the property that contiguous addresses in a process's virtual address space need not be contiguous in physical memory.

A) transparent contiguity
B) dynamic contiguity
C) artificial contiguity
D) static contiguity

Answer 2

C

Question 3

In block mapping systems, _________.

A) the larger the average block size, the larger the amount of mapping information
B) larger blocks can lead to internal fragmentation and can take longer to transfer between secondary storage and main memory
C) fixed-size blocks are called segments
D) variable-size blocks are called pages

Answer 3

B

Question 4

In a block mapping system, suppose that a is a base address stored in the block map table origin register and that the block map table for the process with base address a contains the real address b' for the start of virtual block b in main memory and the real address d' for the start of virtual block d in main memory. What is the real address of virtual address v = (b, d)?

A) b' + d
B) d' + b
C) a + b'
D) a + d'

Question 5

In a paging system, ________.

A) a page frame is always larger than an incoming page
B) a page frame is always smaller than the incoming page
C) given the virtual memory address v = (p, d) , where page p is in page frame p' and the fixed page size is p_s, then the real memory address of v is (p' + d) * p_s
D) when a process references a page that is not in main memory, the operating system loads the nonresident page into memory from secondary storage

Question 6

When a page references a page that is not in main memory, the processor generates a(n) ________.

A) TLB miss
B) page fault
C) general protection fault
D) missing-segment fault

Question 7

Consider paging address translation by direct mapping. Given the base address, a, in the page table origin register, virtual address v = (p, d) and an entry p' (in the page table starting at address a) for the page frame corresponding to virtual page p, what is the real address corresponding to v?

A) p' * d
B) p' concatenated with d
C) (a + p) * d
D) (a + p) concatenated with d

Question 8

Which of the following statements about direct mapping is false?

A) Direct mapping is much like accessing an array location via subscripting.
B) The direct-mapped page table typically is kept in main memory.
C) Using direct-mapping page address translation can cause the computer system to run programs faster.
D) If a process contains n pages in virtual memory space, then the direct-mapped page table for the process contains entries successively for page 0, page 1, page 2, …, page n-1.

Question 9

An associative mapping __________.

A) stores the entire page table in content-addressed associative memory
B) provides better performance than direct mapping
C) is too expensive to implement
D) all of the above

Question 10

A combined direct/associative mapping holds only a small percentage of the complete page table for a process in __________ and keeps the complete page table in __________.

A) secondary storage, direct-mapped memory
B) direct-mapped memory, secondary storage
C) associative memory, main memory
D) associative memory, secondary storage

Question 11

Under direct/associative mapping, ________.

A) accessing the associative memory is slower than accessing the main memory
B) the number of entries in the TLB needs to be large to achieve good performance
C) the page table entries maintained in the TLB typically correspond only to the more-recently referenced pages
D) better performance can be achieved than under a complete associative mapping

Question 12

In multilevel page tables, __________ is reduced compared to direct-mapped tables when process's use only a small number of pages.

A) internal fragmentation
B) external fragmentation
C) memory fragmentation
D) table fragmentation

Question 13

The overhead incurred by multilevel page address translation is __________.

A) significant due to increased table fragmentation
B) significant due to additional memory references
C) offset by caches and TLBs
D) none of the above

Question 14

In an inverted page table, the number of PTEs that must be stored in main memory is proportional to _________.

A) the size of physical memory
B) the size of virtual memory
C) the size of a virtual address space
D) the size of the process

Question 15

Inverted page tables use __________ to map virtual pages to PTEs.

A) arrays
B) hash functions
C) linked lists
D) chaining mechanisms

Question 16

To improve performance, a designer can attempt to reduce the number of collisions that occur in an inverted page table by ________.

A) increasing the size of the inverted page table
B) increasing the range of the hash function using a hash anchor table
C) both a and b
D) none of the above

Question 17

Page sharing ________.

A) increases the amount of main memory required for a group of processes to run efficiently
B) decreases a system's degree of multiprogramming
C) does not allow modifiable procedures from being used by more than one process at the same time
D) none of the above

Question 18

Using copy-on-write to ensure that two processes do not interfere with each other when modifying pages ________.

A) slows down process creation
B) improves performance when processes modify a significant amount of shared data during execution
C) both a and b
D) none of the above

Question 19

All of a process's segments ________.

A) must consist of contiguous memory locations
B) must be the same size
C) must be placed adjacent to one another in main memory
D) are maintained in main memory during execution

Question 20

In a system that uses segmentation address translation by direct mapping, ________.

A) the segment map table origin register contains the segment map table's base address value
B) the mapping mechanism uses the information stored in the segment map table to translate the virtual address to a physical address
C) the sum of the segment map table's base address and the segment number determines the location of the segment's map table entry
D) all of the above

Question 21

A(n) __________ is generated when a displacement is greater than a segment length.

A) missing-segment fault
B) general protection fault
C) segment-overflow exception
D) segment-protection exception

Question 22

Sharing __________ using segmentation can simplify memory management compared to paging.

A) an object
B) reentrant code
C) a dynamic array
D) all of the above

Question 23

________ access is useful for reentrant code because it allows a process to execute a segment or make its own copy of a segment which it may then modify.

A) Read/write
B) Read/execute
C) Write/execute
D) Execute only

Question 24

A process given append-only access to a segment may __________.

A) read information from the segment
B) write information to the segment
C) pass program control to instructions in that segment for execution on a processor
D) write additional information to the end of the segment, but not modify existing information

Question 25

In a combined segmentation/paging system, ________.

A) all the pages of a segment must be in main memory at once
B) virtual memory pages that are contiguous in virtual memory must be contiguous in main memory
C) segments typically are arranged across multiple pages
D) all of the above

Question 26

In a paged and segmented system using combined associative/direct mapping, ________.

A) missing-segment faults, segment-overflow exceptions and segment-protection exceptions can never occur during dynamic address translation
B) the more tables a system maintains in main memory, the fewer processes it can support
C) the associative memory is unimportant to the efficient operation of the dynamic address translation
D) the benefit of maintaining only a few of the tables in main memory at any one time is that address translation proceeds faster at execution time

Question 27

In a segmentation/paging virtual memory system, two processes share memory when ________.

A) each process has a segment map table entry that points to the same page table
B) each process uses the same segment map table
C) each process shares a page table
D) both a and c

Question 28

In the IA-32 architecture, the ________ register typically stores a process's code segment selector (which typically corresponds to the segment containing its executable instructions).

A) SS
B) FS
C) ES
D) CS

Question 29

For operating systems that maintain more than 8,192 segments, or that maintain a separate segment map table for each process, the IA-32 architecture requires the base address of each local descriptor table to be stored in the __________.

A) global descriptor table
B) global descriptor table register
C) local descriptor table register
D) none of the above

Question 30

In the IA-32 architecture, a(n) ________ occurs when a process has attempted to access memory outside of its segment.

A) page fault
B) general protection fault exception
C) segment-overflow exception
D) TLB miss