Multiple Choice
If the initial pulse of 1000 is fed to shift register, after how many clock pulses does the sequence repeat?
A) 15
B) 16
C) 14
D) 17
Correct Answer:

Verified
Correct Answer:
Verified
Q4: The shift register needs to be controlled
Q5: To increase error probability, the processing gain
Q6: The system should have<br>A)larger (j/s)reqd<br>B)greater system's noise
Q7: Processing gain is given as<br>A)wss/r<br>B)rch/r<br>C)wss/r & rch/r<br>D)none
Q8: The ratio (J/S)reqd gives the measure of<br>A)vulnerability
Q10: For maximal length sequence, the sequence repetition
Q11: The broadband jammer jams the entire<br>A)w<br>B)wss<br>C)w &
Q12: DS/BPSK includes<br>A)despreading<br>B)demodulation<br>C)despreading & demodulation<br>D)none of the mentioned
Q13: Which are the design options for anti
Q14: The jammer which monitors a communicator's signal