Multiple Choice
How can parallel data be taken out of a shift register simultaneously?
A) use the q output of the first ff
B) use the q output of the last ff
C) tie all of the q outputs together
D) use the q output of each ff
Correct Answer:
Verified
Correct Answer:
Verified
Q15: Ripple counters are also called <br>A)ssi counters<br>B)asynchronous
Q16: In digital logic, a counter is a
Q17: The time from the beginning of a
Q18: After three clock pulses, the register contains
Q19: In DOWN-counter, each flip-flop is triggered by
Q21: Once an up-/down-counter begins its count sequence,
Q22: BCD counter is also known as <br>A)parallel
Q23: What will be the 4-bit pattern after
Q24: The full form of SIPO is <br>A)serial-in
Q25: In 4-bit up-down counter, how many flip-flops