Sample- And- Hold Circuits in ADCs Are Designed To

Multiple Choice

Sample- and- hold circuits in ADCs are designed to:

A) sample and hold the output of the binary counter during the conversion process.
B) stabilize the input analog signal during the conversion process.
C) sample- and- hold the DAC staircase waveform during the conversion process.
D) stabilize the comparator's threshold voltage (V_T) during the conversion process.