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    Digital Systems
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    Exam 13: Programmable Logic Device Architectures
  5. Question
    A Blown Input to an AND Gate in a PLD
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A Blown Input to an AND Gate in a PLD

Question 14

Question 14

Multiple Choice

A blown input to an AND gate in a PLD would normally be held:


A) tri- state.
B) LOW.
C) invalid.
D) HIGH.

Correct Answer:

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