A Positive Edge- Triggered J- K Flip- Flop Is Used

Multiple Choice

A positive edge- triggered J- K flip- flop is used to produce a two- phase clock. However, when the circuit is operated it produces erratic results. Close examination with an oscilloscope reveals the presence of glitches. What might be the source of these glitches?

A) A race condition exists between the J and K inputs.
B) The PRESET and CLEAR terminals may have been left floating.
C) A race condition exists between the Q and Q outputs to the AND gate.
D) A race condition exists between the CLOCK and the outputs of the flip- flop feeding the AND gate.