Multiple Choice
The R4000 pipeline stage where the instruction result is written back to the register file is the __________ stage.
A) write back
B) tag check
C) data cache
D) instruction execute
Correct Answer:
Verified
Correct Answer:
Verified
Q17: The acronym RISC stands for _.
Q18: With simple,one cycle instructions,there is little or
Q19: The cache is capable of handling global
Q20: Almost all RISC instructions use simple register
Q21: The first commercial RISC product was _.<br>A)SPARC<br>B)CISC<br>C)VAX<br>D)the
Q23: All MIPS R series processor instructions are
Q24: A _ architecture replicates each of the
Q25: _ determines the control and pipeline organization.<br>A)Calculation<br>B)Execution
Q26: _ is the fastest available storage device.<br>A)Main
Q27: Blocks of memory,recently used global variables,memory addressing,and