Question 1

Data travels along a bus with n bits running in parallel,where the bus is n bits wide.

Accepted Answer

A) True 
 B)False  True

Question 2

The MMX register names are just different names for registers in the floating-point unit.

Accepted Answer

A) True 
 B)False  True

Question 3

Requests from hardware devices are called "interrrupts".

Accepted Answer

A) True 
 B)False  True

Question 4

Another name for "machine cycle" is clock cycle.

Accepted Answer

A) True 
 B)False

Question 5

The Zero flag is clear when the result of an arithmetic operation is zero.

Accepted Answer

A) True 
 B)False

Question 6

In 64-bit mode,you can use three more general-purpose registers than in 32-bit mode.

Accepted Answer

A) True 
 B)False

Question 7

When running in 64-bit mode,only the lowest 48 bits of address operands are used.

Accepted Answer

A) True 
 B)False

Question 8

The upper half of the RDX register is called EDX.

Accepted Answer

A) True 
 B)False

Question 9

The Carry flag reflects the status of an usigned arithmetic operation.

Accepted Answer

A) True 
 B)False

Question 10

When running in native 64-bit mode,processors do not support 16-bit Real Mode.

Accepted Answer

A) True 
 B)False

Question 11

The control unit (CU)coordinates the sequencing of steps involved in executing machine instructions.

Accepted Answer

A) True 
 B)False

Question 12

The Basic Input-Output System is a collection of low-level subroutines that communicate directly with hardware devices.

Accepted Answer

A) True 
 B)False

Question 13

The arithmetic logic unit performs addition,subtraction,multiplication,and division operations.

Accepted Answer

A) True 
 B)False

Question 14

In Real-address mode,multiple programs can run at the same time,but they can only address physical memory.

Accepted Answer

A) True 
 B)False

Question 15

The lower half of the RCX register is called EBX.

Accepted Answer

A) True 
 B)False

Exam 2: X86 Processor Architecture Assessment

Data travels along a bus with n bits running in parallel,where the bus is n bits wide.