Exam 4: Processor Technology and Architecture

RISC is a philosophy of processor design that deliberately includes complex instructions.

The frequency at which the system clock generates timing pulses is the system's ____.

A(n) ____________________ is a circuit that can perform a processing function on a single binary electrical signal, or bit.

A(n) ____ is the lowest-level command that software can direct a processor to perform.

____ instructions represent combinations of primitive processing operations.

A perfect conductor can be described as one having maximum resistance.

The ____________________ of the CPU keeps track of the next program instruction location by incrementing a pointer after each fetch.

During the ____ cycle of the CPU, data inputs are prepared for transformation into data outputs.

Quantum computing uses quantum states to simultaneously encode two values per bit, called a ____.

____ is based on the observation that the rate of increase in transistor density on microchips had increased steadily, roughly doubling every 18 to 24 months.

A(n) ____________________ is an object specifically designed to absorb heat and rapidly dissipate it via air or water movement.

Binary addition works with complex data types, such as floating-point and double-precision numbers.

The BRANCH command has one operand containing the memory address of the next instruction.

Several transistors and their interconnections on a single chip form a(n) ____.

A(n) ____ instruction generates the result true if both of its data inputs are true.

____________________ are made of semiconductor material that has been treated, or doped, with chemical impurities to enhance the semiconducting effects.

____ hold frequently used data items such as loop counters and array indexes.

____ describes any CPU architecture in which duplicate CPUs or processor stages can execute in parallel.

Current fabrication technology is capable of squeezing more than a billion transistors onto a wafer of silicon approximately one square centimeter.

A(n) ____ instruction suspends the normal flow of instruction execution in the current program.