Question 1

The outputs of SR latch are______________

Accepted Answer

A) x and y 
B) a and b 
C) s and r 
D) q and q' 
A) x and y 
B) a and b 
C) s and r 
D) q and q' D

Question 2

When a high is applied to the Set line of an SR latch, then______________

Accepted Answer

A) q output goes high 
B) q' output goes high 
C) q output goes low 
D) both q and q' go high 
A) q output goes high 
B) q' output goes high 
C) q output goes low 
D) both q and q' go high A

Question 3

Two stable states of latches are______________

Accepted Answer

A) astable & monostable 
B) low input & high output 
C) high output & low output 
D) low output & high input 
A) astable & monostable 
B) low input & high output 
C) high output & low output 
D) low output & high input C

Question 4

The full form of SR is______________

Accepted Answer

A) system rated 
B) set reset 
C) set ready 
D) set rated 
A) system rated 
B) set reset 
C) set ready 
D) set rated

Question 5

Whose operations are more faster among the following?

Accepted Answer

A) combinational circuits 
B) sequential circuits 
C) latches 
D) flip-flops 
A) combinational circuits 
B) sequential circuits 
C) latches 
D) flip-flops

Question 6

The output of latches will remain in set/reset untill

Accepted Answer

A) the trigger pulse is given to change the state 
B) any pulse given to go into previous state 
C) they don't get any pulse more 
D) the pulse is edge-triggered 
A) the trigger pulse is given to change the state 
B) any pulse given to go into previous state 
C) they don't get any pulse more 
D) the pulse is edge-triggered

Question 7

When both inputs of SR latches are low, the latch

Accepted Answer

A) q output goes high 
B) q' output goes high 
C) it remains in its previously set or reset state 
D) it goes to its next set or reset state 
A) q output goes high 
B) q' output goes high 
C) it remains in its previously set or reset state 
D) it goes to its next set or reset state

Question 8

The truth table for an S-R flip-flop has how many VALID entries?

Accepted Answer

A) 1 
B) 2 
C) 3 
D) 4 
A) 1 
B) 2 
C) 3 
D) 4

Question 9

The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?

Accepted Answer

A) because of inverted outputs 
B) because of triggering functionality 
C) because of cross-coupled connection 
D) because of inverted outputs & triggering functionality 
A) because of inverted outputs 
B) because of triggering functionality 
C) because of cross-coupled connection 
D) because of inverted outputs & triggering functionality

Question 10

The sequential circuit is also called______________

Accepted Answer

A) flip-flop 
B) latch 
C) strobe 
D) adder 
A) flip-flop 
B) latch 
C) strobe 
D) adder

Question 11

The SR latch consists of______________

Accepted Answer

A) 1 input 
B) 2 inputs 
C) 3 inputs 
D) 4 inputs 
A) 1 input 
B) 2 inputs 
C) 3 inputs 
D) 4 inputs

Question 12

The inputs of SR latch are______________

Accepted Answer

A) x and y 
B) a and b 
C) s and r 
D) j and k 
A) x and y 
B) a and b 
C) s and r 
D) j and k

Question 13

What is a trigger pulse?

Accepted Answer

A) a pulse that starts a cycle of operation 
B) a pulse that reverses the cycle of operation 
C) a pulse that prevents a cycle of operation 
D) a pulse that enhances a cycle of operation 
A) a pulse that starts a cycle of operation 
B) a pulse that reverses the cycle of operation 
C) a pulse that prevents a cycle of operation 
D) a pulse that enhances a cycle of operation

Question 14

The NAND latch works when both inputs are

Accepted Answer

A) 1 
B) 0 
C) inverted 
D) don't cares 
A) 1 
B) 0 
C) inverted 
D) don't cares

Question 15

When both inputs of a J-K flip-flop cycle, the output will______________

Accepted Answer

A) be invalid 
B) change 
C) not change 
D) toggle 
A) be invalid 
B) change 
C) not change 
D) toggle

Question 16

The basic latch consists of______________

Accepted Answer

A) two inverters 
B) two comparators 
C) two amplifiers 
D) two adders 
A) two inverters 
B) two comparators 
C) two amplifiers 
D) two adders

Question 17

In S-R flip-flop, if Q = 0 the output is said to be

Accepted Answer

A) set 
B) reset 
C) previous state 
D) current state 
A) set 
B) reset 
C) previous state 
D) current state

Question 18

One example of the use of an S-R flip-flop is as

Accepted Answer

A) transition pulse generator 
B) racer 
C) switch debouncer 
D) astable oscillator 
A) transition pulse generator 
B) racer 
C) switch debouncer 
D) astable oscillator

Question 19

How many types of sequential circuits are?

Accepted Answer

A) 2 
B) 3 
C) 4 
D) 5 
A) 2 
B) 3 
C) 4 
D) 5

Question 20

A basic S-R flip-flop can be constructed by cross- coupling of which basic logic gates?

Accepted Answer

A) and or or gates 
B) xor or xnor gates 
C) nor or nand gates 
D) and or nor gates 
A) and or or gates 
B) xor or xnor gates 
C) nor or nand gates 
D) and or nor gates

The outputs of SR latch are______________

When a high is applied to the Set line of an SR latch, then______________

Two stable states of latches are______________

The full form of SR is______________

Whose operations are more faster among the following?

The output of latches will remain in set/reset untill

When both inputs of SR latches are low, the latch

The truth table for an S-R flip-flop has how many VALID entries?

The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?

The sequential circuit is also called______________

The SR latch consists of______________

The inputs of SR latch are______________

What is a trigger pulse?

The NAND latch works when both inputs are

When both inputs of a J-K flip-flop cycle, the output will______________

The basic latch consists of______________

In S-R flip-flop, if Q = 0 the output is said to be

One example of the use of an S-R flip-flop is as

How many types of sequential circuits are?

A basic S-R flip-flop can be constructed by cross- coupling of which basic logic gates?

Number Systems and Binary Codes

Boolean Algebra

Boolean Algebra and Logic Circuits

Logic Circuit and Arithmetic Unit

Digital Number Systems and Comparators

Digital Comparators, Encoders, and Multiplexers

Digital Circuits and HDL Applications

Registers and Counters in Digital Logic

Sequential Circuits and Fault Detection Techniques

Ram, Memory, and Storage Technology

Transmission, Memory and PLDS

Programmable Logic Devices PLDS and Field-Programmable Gate Arrays FPGAS

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Exam 8: Understanding Flip-Flop and Sequential Circuits

The outputs of SR latch are______________

When a high is applied to the Set line of an SR latch, then______________

Two stable states of latches are______________

The full form of SR is______________

Whose operations are more faster among the following?

The output of latches will remain in set/reset untill

When both inputs of SR latches are low, the latch

The truth table for an S-R flip-flop has how many VALID entries?

The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?

The sequential circuit is also called______________

The SR latch consists of______________

The inputs of SR latch are______________

What is a trigger pulse?

The NAND latch works when both inputs are

When both inputs of a J-K flip-flop cycle, the output will______________

The basic latch consists of______________

In S-R flip-flop, if Q = 0 the output is said to be

One example of the use of an S-R flip-flop is as

How many types of sequential circuits are?

A basic S-R flip-flop can be constructed by cross- coupling of which basic logic gates?

Number Systems and Binary Codes

Boolean Algebra

Boolean Algebra and Logic Circuits

Logic Circuit and Arithmetic Unit

Digital Number Systems and Comparators

Digital Comparators, Encoders, and Multiplexers

Digital Circuits and HDL Applications

Registers and Counters in Digital Logic

Sequential Circuits and Fault Detection Techniques

Ram, Memory, and Storage Technology

Transmission, Memory and PLDS

Programmable Logic Devices PLDS and Field-Programmable Gate Arrays FPGAS

Filters