Exam 13: Programmable Logic Devices PLDS and Field-Programmable Gate Arrays FPGAS

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How many two-input AND and OR gates are required to realize Y = CD+EF+G?

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A

If a PAL has been programmed once

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D

Applications of PLAs are______________          

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D

The FPGA refers to______________        

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PAL refers to______________        

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In FPGA, vertical and horizontal directions are separated by______________        

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The logic circuits whose outputs at any instant of time depends only on the present input but also on the past outputs are called

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For programmable logic functions, which type of PLD should be used?

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PLA contains______________        

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PLA refers to______________  

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A PLA is similar to a ROM in concept except that

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The full form of VLSI is______________        

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How many types of PLD is?

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Which type of device FPGA are?

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The difference between a PAL & a PLA is

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The complex programmable logic device contains several PLD blocks and______________    

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The flag bits in an ALU is defined as

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The problem where process concurrency becomes an issue is called as______________      

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Outputs of the AND gate in PLD is known as

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The inputs in the PLD is given through

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