The CMOS Inverter Shown in Fig$V_{D D}=1.8 \mathrm{~V}$ And Is Fabricated in A

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The Answer is $Figure 16.2.1 (a) For the inverter switching to occur at 0.9 \mathrm{~V} , which is V_{D D} / 2, Q_{N} and Q_{P} must be matched: \begin{aligned} k_{n} & =k_{p} \ \mu_{n} C_{O x}\left(\frac{W}{L} ight)_{N} & =\mu_{p} C_{O x}\left(\frac{W}{L} ight)_{P} \end{aligned} Thus, \frac{(W / P)_{P}}{(W / L)_{N}}=\frac{\mu_{n}}{\mu_{p}}=4 Since L_{N}=L_{P}=0.18 \mu \mathrm{m} and \begin{aligned} \left(\frac{W}{L} ight)_{N} & =1.5 \ \Rightarrow W_{N} & =1.5 imes 0.18=0.27 \mu \mathrm{m} \ W_{P} & =4 W_{N}=4 imes 0.27=1.08 \mu \mathrm{m} \end{aligned} we obtain \left(\frac{W}{L} ight)_{P}=\frac{1.08 \mu \mathrm{m}}{0.18 \mu \mathrm{m}} (b) \begin{aligned} V_{O H} & =V_{D D}=1.8 \mathrm{~V} \ V_{O L} & =0 \mathrm{~V} \ V_{I L} & =\frac{1}{8}\left(3 V_{D D}+2 V_{t} ight) \ & =\frac{1}{8}(3 imes 1.8+2 imes 0.4) \ & =0.775 \mathrm{~V} \ N M_{L} & =V_{I L}-V_{O L}=0.775-0=0.775 \mathrm{~V} \ N M_{H} & =N M_{L}=0.775 \mathrm{~V} \end{aligned} (c) At the switching point, Q_{N} and Q_{P} operate in saturation: \begin{aligned} I_{D} & =\frac{1}{2} \mu_{n} C_{o x}\left(\frac{W}{L} ight)_{N}\left(\frac{V_{D D}}{2}-V_{t} ight)^{2} \ & =\frac{1}{2} imes 0.4 imes 1.5(0.9-0.4)^{2} \ & =0.075 \mathrm{~mA}=75 \mu \mathrm{A} \end{aligned} (d) For v_{I}=1.8 \mathrm{~V}, Q_{N} is operating in the triode region: i_{D N}=k_{n}\left[\left(v_{G S}-V_{t n} ight) v_{D S}-\frac{1}{2} v_{D S}^{2} ight] For v_{G S}=1.8 \mathrm{~V} and v_{D S}=0.4 \mathrm{~V} , \begin{aligned} i_{D N} & =0.4 imes 1.5\left[(1.8-0.4) 0.4-\frac{1}{2} imes 0.4^{2} ight] \ & =0.288 \mathrm{~mA} \end{aligned}$

Figure 16.2.1
(a) For the inverter switching to occur at

0.9 \mathrm{~V}

, which is

V_{D D} / 2, Q_{N}

and

Q_{P}

must be matched:

\begin{aligned}k_{n} & =k_{p} \\mu_{n} C_{O x}\left(\frac{W}{L} ight)_{N} & =\mu_{p} C_{O x}\left(\frac{W}{L} ight)_{P}\end{aligned}

Thus,

\frac{(W / P)_{P}}{(W / L)_{N}}=\frac{\mu_{n}}{\mu_{p}}=4

Since

L_{N}=L_{P}=0.18 \mu \mathrm{m}

and

\begin{aligned}\left(\frac{W}{L} ight)_{N} & =1.5 \\Rightarrow W_{N} & =1.5 imes 0.18=0.27 \mu \mathrm{m} \W_{P} & =4 W_{N}=4 imes 0.27=1.08 \mu \mathrm{m}\end{aligned}

we obtain

\left(\frac{W}{L} ight)_{P}=\frac{1.08 \mu \mathrm{m}}{0.18 \mu \mathrm{m}}

(b)

\begin{aligned}V_{O H} & =V_{D D}=1.8 \mathrm{~V} \V_{O L} & =0 \mathrm{~V} \V_{I L} & =\frac{1}{8}\left(3 V_{D D}+2 V_{t} ight) \& =\frac{1}{8}(3 imes 1.8+2 imes 0.4) \& =0.775 \mathrm{~V} \N M_{L} & =V_{I L}-V_{O L}=0.775-0=0.775 \mathrm{~V} \N M_{H} & =N M_{L}=0.775 \mathrm{~V}\end{aligned}

(c) At the switching point,

Q_{N}

and

Q_{P}

operate in saturation:

\begin{aligned}I_{D} & =\frac{1}{2} \mu_{n} C_{o x}\left(\frac{W}{L} ight)_{N}\left(\frac{V_{D D}}{2}-V_{t} ight)^{2} \& =\frac{1}{2} imes 0.4 imes 1.5(0.9-0.4)^{2} \& =0.075 \mathrm{~mA}=75 \mu \mathrm{A}\end{aligned}

(d) For

v_{I}=1.8 \mathrm{~V}, Q_{N}

is operating in the triode region:

i_{D N}=k_{n}\left[\left(v_{G S}-V_{t n} ight) v_{D S}-\frac{1}{2} v_{D S}^{2} ight]

For

v_{G S}=1.8 \mathrm{~V}

and

v_{D S}=0.4 \mathrm{~V}

,

\begin{aligned}i_{D N} & =0.4 imes 1.5\left[(1.8-0.4) 0.4-\frac{1}{2} imes 0.4^{2} ight] \& =0.288 \mathrm{~mA}\end{aligned}

The CMOS Inverter Shown in Fig $V_{D D}=1.8 \mathrm{~V}$ And Is Fabricated in A

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The CMOS Inverter Shown in Fig VDD=1.8 VV_{D D}=1.8 \mathrm{~V}VDD​=1.8 V And Is Fabricated in A

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The CMOS Inverter Shown in Fig $V_{D D}=1.8 \mathrm{~V}$ And Is Fabricated in A

Correct Answer:
Verified