Question 1

A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a conventional page table.

Accepted Answer

A) True 
 B)False  False

Question 2

External fragmentation is

Accepted Answer

A)  when there is some unused memory that cannot be allocated to a process. 
B)  when the amount of available memory is less than the size of a process. 
C)  when a process is broken up into smaller parts for memory allocation. 
D)  when there is enough total memory space to satisfy a request but the available spaces are not contiguous. 
A)  when there is some unused memory that cannot be allocated to a process. 
B)  when the amount of available memory is less than the size of a process. 
C)  when a process is broken up into smaller parts for memory allocation. 
D)  when there is enough total memory space to satisfy a request but the available spaces are not contiguous. D

Question 3

Using Figure 9.12, describe how a logical address is translated to a physical address.

Accepted Answer

A logical address is generated by the CPU. This logical address consists of a page number and offset. The TLB is first checked to see if the page number is present. If so, a TLB hit, the corresponding page frame is extracted from the TLB, thus producing the physical address. In the case of a TLB miss, the page table must be searched according to page number for the corresponding page frame.

Question 4

Replacement Question: Address translation from a logical address to a physical address in IA-32 architecture is comprised of

Accepted Answer

A)  a segmentation unit that translates the logical address to its physical address. 
B)  a paging unit that translates the logical address to its physical address. 
C)  a segmentation unit followed by a paging unit that translate the logical address to its physical address. 
D)  a paging unit followed by a segmentation unit that translates the logical address to its physical address. 
A)  a segmentation unit that translates the logical address to its physical address. 
B)  a paging unit that translates the logical address to its physical address. 
C)  a segmentation unit followed by a paging unit that translate the logical address to its physical address. 
D)  a paging unit followed by a segmentation unit that translates the logical address to its physical address.

Question 5

Mobile operating systems typically support swapping.

Accepted Answer

A) True 
 B)False

Question 6

The roll out, roll in variant of swapping is used ____.

Accepted Answer

A)  when a backing store is not necessary 
B)  for the round-robin scheduling algorithm 
C)  for priority-based scheduling algorithms 
D)  when the load on the system has temporarily been reduced 
A)  when a backing store is not necessary 
B)  for the round-robin scheduling algorithm 
C)  for priority-based scheduling algorithms 
D)  when the load on the system has temporarily been reduced

Question 7

Which of the following technique is well suited to support very large address space, e.g. 64-bit address space?

Accepted Answer

A)  Inverted page tables 
B)  Hierarchical page tables 
C)  Clustered page tables 
D)  All of the above 
A)  Inverted page tables 
B)  Hierarchical page tables 
C)  Clustered page tables 
D)  All of the above

Question 8

How is a limit register used for protecting main memory?

Accepted Answer

When the CPU is executing a process, it

Question 9

A page-table base register stores

Accepted Answer

A)  a pointer to the page table in memory. 
B)  the starting logical address of the page currently being accessed. 
C)  the starting physical address of the frame currently being addressed. 
D)  the page size of the page currently being accessed. 
A)  a pointer to the page table in memory. 
B)  the starting logical address of the page currently being accessed. 
C)  the starting physical address of the frame currently being addressed. 
D)  the page size of the page currently being accessed.

Question 10

Without a mechanism such as an address-space identifier, the TLB must be flushed during a context switch.

Accepted Answer

A) True 
 B)False

Question 11

A translation look-aside buffer is used to

Accepted Answer

A)  cache page table entries. 
B)  store the address of the page table in memory. 
C)  size of the logical address space of the currently running process. D store page size. 
A)  cache page table entries. 
B)  store the address of the page table in memory. 
C)  size of the logical address space of the currently running process. D store page size.

Question 12

When does external fragmentation occur?

Accepted Answer

As processes are loaded and removed from

Question 13

Suppose the size of a process is 10,000 bytes and the relocation register is loaded with value 5000, which of the following memory address this process can access?

Accepted Answer

A)  logical address 10,350 
B)  physical address 4,500 
C)  physical address 10,350 
D)  None of the above 
A)  logical address 10,350 
B)  physical address 4,500 
C)  physical address 10,350 
D)  None of the above

Question 14

A 64-bit architecture with more than 16 quintillion addressable memory

Accepted Answer

A)  can support a majority of today's application requirements, but not all. 
B)  is large enough to support all current as well as future application requirements. 
C)  is large enough to support all current application requirements but may not be able to support all future application requirements. 
D)  All of the above. 
A)  can support a majority of today's application requirements, but not all. 
B)  is large enough to support all current as well as future application requirements. 
C)  is large enough to support all current application requirements but may not be able to support all future application requirements. 
D)  All of the above.

Question 15

A large page size results in

Accepted Answer

A)  lower internal fragmentation 
B)  larger page table overhead 
C)  efficient disk I/O 
D)  All of the above 
A)  lower internal fragmentation 
B)  larger page table overhead 
C)  efficient disk I/O 
D)  All of the above

Question 16

If execution time binding is used,

Accepted Answer

A)  logical addresses of process may change over time but physical addresses remain the same. 
B)  physical addresses of process may change over time but logical addresses remain the same. 
C)  both physical and logical addresses may change over time. 
D)  both physical and logical addresses remain the same over time. 
A)  logical addresses of process may change over time but physical addresses remain the same. 
B)  physical addresses of process may change over time but logical addresses remain the same. 
C)  both physical and logical addresses may change over time. 
D)  both physical and logical addresses remain the same over time.

Question 17

The protection bit in a page table

Accepted Answer

A)  provides protection against unauthorized updates in the page table. 
B)  marks a page table as read-only or read-write. 
C)  marks a frame as read-only or read-write. 
D)  All of the above. 
A)  provides protection against unauthorized updates in the page table. 
B)  marks a page table as read-only or read-write. 
C)  marks a frame as read-only or read-write. 
D)  All of the above.

Question 18

If the base register is loaded with value 12345 and limit register is loaded with value 1000, which of the following memory address access will not result in a trap to the operating system?

Accepted Answer

A)  12500 
B)  12200 
C)  13346 
D)  12344 
A)  12500 
B)  12200 
C)  13346 
D)  12344

Question 19

The _____ binding scheme facilitates swapping.

Accepted Answer

A)  interrupt time 
B)  load time 
C)  assembly time 
D)  execution time 
A)  interrupt time 
B)  load time 
C)  assembly time 
D)  execution time

Question 20

The ARM architecture uses both single-level and two-level paging.

Accepted Answer

A) True 
 B)False

A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a conventional page table.

External fragmentation is

Using Figure 9.12, describe how a logical address is translated to a physical address.

Replacement Question: Address translation from a logical address to a physical address in IA-32 architecture is comprised of

Mobile operating systems typically support swapping.

The roll out, roll in variant of swapping is used ____.

Which of the following technique is well suited to support very large address space, e.g. 64-bit address space?

How is a limit register used for protecting main memory?

A page-table base register stores

Without a mechanism such as an address-space identifier, the TLB must be flushed during a context switch.

A translation look-aside buffer is used to

When does external fragmentation occur?

Suppose the size of a process is 10,000 bytes and the relocation register is loaded with value 5000, which of the following memory address this process can access?

A 64-bit architecture with more than 16 quintillion addressable memory

A large page size results in

If execution time binding is used,

The protection bit in a page table

If the base register is loaded with value 12345 and limit register is loaded with value 1000, which of the following memory address access will not result in a trap to the operating system?

The _____ binding scheme facilitates swapping.

The ARM architecture uses both single-level and two-level paging.

Introduction

Operating-System Structures

Processes

Threads Concurrency

Cpu Scheduling

Synchronization Tools

Synchronization Examples

Deadlocks

Virtual Memory

Mass-Storage Structure

Io Systems

File-System Interface

File-System Implementation

File-System Internals

Security

Protection

Filters

Exam 9: Main Memory

A 32-bit logical address with 8 KB page size will have 1,000,000 entries in a conventional page table.

External fragmentation is

Using Figure 9.12, describe how a logical address is translated to a physical address.

Replacement Question: Address translation from a logical address to a physical address in IA-32 architecture is comprised of

Mobile operating systems typically support swapping.

The roll out, roll in variant of swapping is used ____.

Which of the following technique is well suited to support very large address space, e.g. 64-bit address space?

How is a limit register used for protecting main memory?

A page-table base register stores

Without a mechanism such as an address-space identifier, the TLB must be flushed during a context switch.

A translation look-aside buffer is used to

When does external fragmentation occur?

Suppose the size of a process is 10,000 bytes and the relocation register is loaded with value 5000, which of the following memory address this process can access?

A 64-bit architecture with more than 16 quintillion addressable memory

A large page size results in

If execution time binding is used,

The protection bit in a page table

If the base register is loaded with value 12345 and limit register is loaded with value 1000, which of the following memory address access will not result in a trap to the operating system?

The _____ binding scheme facilitates swapping.

The ARM architecture uses both single-level and two-level paging.

Introduction

Operating-System Structures

Processes

Threads Concurrency

Cpu Scheduling

Synchronization Tools

Synchronization Examples

Deadlocks

Virtual Memory

Mass-Storage Structure

Io Systems

File-System Interface

File-System Implementation

File-System Internals

Security

Protection

Filters