Exam 9: Main Memory

arrow
  • Select Tags
search iconSearch Question
flashcardsStudy Flashcards
  • Select Tags

What is the context switch time, associated with swapping, if a disk drive with a transfer rate of 2 MB/s is used to swap out part of a process that is 200 KB in size? Assume that no seeks are necessary and that the average latency is 15 ms. The time should reflect only the amount of time necessary to swap out the process.

(Short Answer)
5.0/5
(32)

Reentrant code is easier to share when paging is used, because

(Multiple Choice)
4.8/5
(39)

A page out operation

(Multiple Choice)
4.9/5
(35)

A frame table stores

(Multiple Choice)
4.8/5
(32)

Inverted page tables require each process to have its own page table.

(True/False)
4.9/5
(39)

Assume a system uses 2-level paging and has a TLB hit ratio of 90%. It requires 15 nanoseconds to access the TLB, and 85 nanoseconds to access main memory. What is the effective memory access time in nanoseconds for this system?

(Multiple Choice)
4.7/5
(31)

The x86-64 architecture provides support for

(Multiple Choice)
4.9/5
(27)

What is the advantage of using dynamic loading?

(Essay)
4.9/5
(26)

Reentrant code cannot be shared.

(True/False)
4.7/5
(34)

Which of the following statement is correct?

(Multiple Choice)
4.9/5
(32)

An address generated by a CPU is referred to as a ____.

(Multiple Choice)
4.7/5
(36)

In swapping with paging technique, individual pages of a process are swapped in or out.

(True/False)
4.9/5
(32)

Describe the elements of a hashed page table.

(Essay)
4.9/5
(36)

_____ is the method of binding instructions and data to memory performed by most general-purpose operating systems.

(Multiple Choice)
4.9/5
(47)

Suppose a program is operating with execution-time binding and the physical address generated is 300. The relocation register is set to 100. What is the corresponding logical address?

(Multiple Choice)
4.8/5
(31)

Using Figure 9.26, describe how address translation is performed on ARM architectures.

(Essay)
5.0/5
(38)

Hierarchical page tables are appropriate for 64-bit architectures.

(True/False)
5.0/5
(32)

A relocation register is used to check for invalid memory addresses generated by a CPU.

(True/False)
4.9/5
(37)
Showing 41 - 58 of 58
close modal

Filters

  • Essay(0)
  • Multiple Choice(0)
  • Short Answer(0)
  • True False(0)
  • Matching(0)