Question 1

In counter universal clock is not used.

Accepted Answer

A) synchronous counter 
B) asynchronous counter 
C) decade counter 
D) ring counter 
A) synchronous counter 
B) asynchronous counter 
C) decade counter 
D) ring counter B

Question 2

'shift_reg' is used to initialize the

Accepted Answer

A) lsb 
B) msb 
C) register type 
D) register bits 
A) lsb 
B) msb 
C) register type 
D) register bits B

Question 3

Synchronous counter use global clock, unlike asynchronous counter.

Accepted Answer

A) one 
B) two 
C) three 
D) zero 
A) one 
B) two 
C) three 
D) zero A

Question 4

The process statement used in combinational circuits is called process.

Accepted Answer

A) combinational 
B) clocked 
C) unclocked 
D) sequential 
A) combinational 
B) clocked 
C) unclocked 
D) sequential

Question 5

What kind of output does mealy machine produce?

Accepted Answer

A) asynchronous 
B) synchronous 
C) level 
D) pulsed 
A) asynchronous 
B) synchronous 
C) level 
D) pulsed

Question 6

State transition happens in every clock cycle.

Accepted Answer

A) once 
B) twice 
C) thrice 
D) four times 
A) once 
B) twice 
C) thrice 
D) four times

Question 7

In the FSM diagram, what does the information below the line in the circle represent?

Accepted Answer

A) change of state 
B) state 
C) output value 
D) initial state 
A) change of state 
B) state 
C) output value 
D) initial state

Question 8

Which of the following react faster to inputs?

Accepted Answer

A) sequencer 
B) generators 
C) mealy machines 
D) moore machines 
A) sequencer 
B) generators 
C) mealy machines 
D) moore machines

Question 9

What happens if the input is low in FSM?

Accepted Answer

A) change of state 
B) no transition in state 
C) remains in a single state 
D) invalid state 
A) change of state 
B) no transition in state 
C) remains in a single state 
D) invalid state

Question 10

Why we need to include all the input signals in the sensitivity list of the process?

Accepted Answer

A) to monitor the output continuously 
B) to monitor the input continuously 
C) to make the circuit synthesizable by eda tools 
D) no special purpose 
A) to monitor the output continuously 
B) to monitor the input continuously 
C) to make the circuit synthesizable by eda tools 
D) no special purpose

Question 11

What happens if the input is high in FSM?

Accepted Answer

A) change of state 
B) no transition in state 
C) remains in a single state 
D) invalid state 
A) change of state 
B) no transition in state 
C) remains in a single state 
D) invalid state

Question 12

How many types of shift operators are there in VHDL?

Accepted Answer

A) three 
B) four 
C) five 
D) six 
A) three 
B) four 
C) five 
D) six

Question 13

What is the first state of FSM?

Accepted Answer

A) wait loop state 
B) initial state 
C) output state 
D) activate pulse state 
A) wait loop state 
B) initial state 
C) output state 
D) activate pulse state

Question 14

In FSM diagram what does circle represent?

Accepted Answer

A) change of state 
B) state 
C) output value 
D) initial state 
A) change of state 
B) state 
C) output value 
D) initial state

Question 15

Which of the following flip-flop is used by the ring counter?

Accepted Answer

A) d flip-flops 
B) sr flip-flops 
C) jk flip-flops 
D) t flip-flops 
A) d flip-flops 
B) sr flip-flops 
C) jk flip-flops 
D) t flip-flops

Question 16

States in FSM are represented by

Accepted Answer

A) bits 
B) bytes 
C) word 
D) character 
A) bits 
B) bytes 
C) word 
D) character

Question 17

In the FSM diagram, what does arrow between the circles represent?

Accepted Answer

A) change of state 
B) state 
C) output value 
D) initial state 
A) change of state 
B) state 
C) output value 
D) initial state

Question 18

In mealy type FSM, the path is labelled by which of the following?

Accepted Answer

A) inputs 
B) outputs 
C) both inputs and outputs 
D) current state 
A) inputs 
B) outputs 
C) both inputs and outputs 
D) current state

Question 19

How many types of the data type are there in the ring counter?

Accepted Answer

A) one 
B) two 
C) three 
D) more than three 
A) one 
B) two 
C) three 
D) more than three

Question 20

What is the first step in writing the VHDL for an FSM?

Accepted Answer

A) to define the vhdl entity 
B) naming the entity 
C) defining the data type 
D) creating the states 
A) to define the vhdl entity 
B) naming the entity 
C) defining the data type 
D) creating the states

In counter universal clock is not used.

'shift_reg' is used to initialize the

Synchronous counter use global clock, unlike asynchronous counter.

The process statement used in combinational circuits is called process.

What kind of output does mealy machine produce?

State transition happens in every clock cycle.

In the FSM diagram, what does the information below the line in the circle represent?

Which of the following react faster to inputs?

What happens if the input is low in FSM?

Why we need to include all the input signals in the sensitivity list of the process?

What happens if the input is high in FSM?

How many types of shift operators are there in VHDL?

What is the first state of FSM?

In FSM diagram what does circle represent?

Which of the following flip-flop is used by the ring counter?

States in FSM are represented by

In the FSM diagram, what does arrow between the circles represent?

In mealy type FSM, the path is labelled by which of the following?

How many types of the data type are there in the ring counter?

What is the first step in writing the VHDL for an FSM?

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

TTL Circuits, Karnaugh Maps, and Flip-Flops

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Flip-Flops, Adders, and Subtractors

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters

Exam 13: Flip-Flops, Shift Operators, and Finite State Machines Fsm in VHDL

In counter universal clock is not used.

'shift_reg' is used to initialize the

Synchronous counter use global clock, unlike asynchronous counter.

The process statement used in combinational circuits is called process.

What kind of output does mealy machine produce?

State transition happens in every clock cycle.

In the FSM diagram, what does the information below the line in the circle represent?

Which of the following react faster to inputs?

What happens if the input is low in FSM?

Why we need to include all the input signals in the sensitivity list of the process?

What happens if the input is high in FSM?

How many types of shift operators are there in VHDL?

What is the first state of FSM?

In FSM diagram what does circle represent?

Which of the following flip-flop is used by the ring counter?

States in FSM are represented by

In the FSM diagram, what does arrow between the circles represent?

In mealy type FSM, the path is labelled by which of the following?

How many types of the data type are there in the ring counter?

What is the first step in writing the VHDL for an FSM?

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

TTL Circuits, Karnaugh Maps, and Flip-Flops

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Flip-Flops, Adders, and Subtractors

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters