Question 1

A NAND based S'-R' latch can be converted into S-R latch by placing

Accepted Answer

A) a d latch at each of its input 
B) an inverter at each of its input 
C) it can never be converted 
D) both a d latch and an inverter at its input 
A) a d latch at each of its input 
B) an inverter at each of its input 
C) it can never be converted 
D) both a d latch and an inverter at its input D

Question 2

Which of the following expressions is in the sum-of-products form?

Accepted Answer

A) (a + b)(c + d) 
B) (a * b)(c * d) 
C) a* b *(cd) 
D) a * b + c * d 
A) (a + b)(c + d) 
B) (a * b)(c * d) 
C) a* b *(cd) 
D) a * b + c * d D

Question 3

How many types of flip-flops are?

Accepted Answer

A) 2 
B) 3 
C) 4 
D) 5 
A) 2 
B) 3 
C) 4 
D) 5 C

Question 4

The S-R flip flop consist of

Accepted Answer

A) 4 and gates 
B) two additional and gates 
C) an additional clock input 
D) 3 and gates 
A) 4 and gates 
B) two additional and gates 
C) an additional clock input 
D) 3 and gates

Question 5

When both inputs of a J-K flip-flop cycle, the output will

Accepted Answer

A) be invalid 
B) change 
C) not change 
D) toggle 
A) be invalid 
B) change 
C) not change 
D) toggle

Question 6

One example of the use of an S-R flip-flop is as

Accepted Answer

A) racer 
B) stable oscillator 
C) binary storage register 
D) transition pulse generator 
A) racer 
B) stable oscillator 
C) binary storage register 
D) transition pulse generator

Question 7

What is the hold condition of a flip-flop?

Accepted Answer

A) both s and r inputs activated 
B) no active s or r input 
C) only s is active 
D) only r is active 
A) both s and r inputs activated 
B) no active s or r input 
C) only s is active 
D) only r is active

Question 8

Each "0" entry in a K-map square represents:

Accepted Answer

A) a high for each input truth table condition that produces a high output 
B) a high output on the truth table for all low input combinations 
C) a low output for all possible high input conditions 
D) a don't care condition for all possible input truth table combinations 
A) a high for each input truth table condition that produces a high output 
B) a high output on the truth table for all low input combinations 
C) a low output for all possible high input conditions 
D) a don't care condition for all possible input truth table combinations

Question 9

Which of the examples below expresses the commutative law of multiplication?

Accepted Answer

A) a + b = b + a 
B) a • b = b + a 
C) a • (b • c) = (a • b) • c 
D) a • b = b • a 
A) a + b = b + a 
B) a • b = b + a 
C) a • (b • c) = (a • b) • c 
D) a • b = b • a

Question 10

The systematic reduction of logic circuits is accomplished by:

Accepted Answer

A) symbolic reduction 
B) ttl logic 
C) using boolean algebra 
D) using a truth table 
A) symbolic reduction 
B) ttl logic 
C) using boolean algebra 
D) using a truth table

Question 11

One example of the use of an S-R flip-flop is as

Accepted Answer

A) transition pulse generator 
B) racer 
C) switch debouncer 
D) astable oscillator 
A) transition pulse generator 
B) racer 
C) switch debouncer 
D) astable oscillator

Question 12

Looping on a K-map always results in the elimination of

Accepted Answer

A) variables within the loop that appear only in their complemented form 
B) variables that remain unchanged within the loop 
C) variables within the loop that appear in both complemented and uncomplemented form 
D) variables within the loop that appear only in their uncomplemented form 
A) variables within the loop that appear only in their complemented form 
B) variables that remain unchanged within the loop 
C) variables within the loop that appear in both complemented and uncomplemented form 
D) variables within the loop that appear only in their uncomplemented form

Question 13

Each "1" entry in a K-map square represents:

Accepted Answer

A) a high for each input truth table condition that produces a high output 
B) a high output on the truth table for all low input combinations 
C) a low output for all possible high input conditions 
D) a don't care condition for all possible input truth table combinations 
A) a high for each input truth table condition that produces a high output 
B) a high output on the truth table for all low input combinations 
C) a low output for all possible high input conditions 
D) a don't care condition for all possible input truth table combinations

Question 14

A TTL gate may operate inadvertently as an

Accepted Answer

A) digital amplifier 
B) analog amplifier 
C) inverter 
D) regulator 
A) digital amplifier 
B) analog amplifier 
C) inverter 
D) regulator

Question 15

When is a flip-flop said to be transparent?

Accepted Answer

A) when the q output is opposite the input 
B) when the q output follows the input 
C) when you can see through the ic packaging 
D) when the q output is complementary of the input 
A) when the q output is opposite the input 
B) when the q output follows the input 
C) when you can see through the ic packaging 
D) when the q output is complementary of the input

Question 16

The difference between a flip-flop & latch is

Accepted Answer

A) both are same 
B) flip-flop consist of an extra output 
C) latches has one input but flip-flop has two 
D) latch has two inputs but flip-flop has one 
A) both are same 
B) flip-flop consist of an extra output 
C) latches has one input but flip-flop has two 
D) latch has two inputs but flip-flop has one

Question 17

Which statement below best describes a Karnaugh map?

Accepted Answer

A) it is simply a rearranged truth table 
B) the karnaugh map eliminates the need for using nand and nor gates 
C) variable complements can be eliminated by using karnaugh maps 
D) a karnaugh map can be used to replace boolean rules 
A) it is simply a rearranged truth table 
B) the karnaugh map eliminates the need for using nand and nor gates 
C) variable complements can be eliminated by using karnaugh maps 
D) a karnaugh map can be used to replace boolean rules

Question 18

What is one disadvantage of an S-R flip-flop?

Accepted Answer

A) it has no enable input 
B) it has a race condition 
C) it has no clock input 
D) invalid state 
A) it has no enable input 
B) it has a race condition 
C) it has no clock input 
D) invalid state

Question 19

In a NAND based S'-R' latch, if S'=1 & R'=1 then the state of the latch is

Accepted Answer

A) no change 
B) set 
C) reset 
D) forbidden 
A) no change 
B) set 
C) reset 
D) forbidden

Question 20

The Boolean expression Y = (AB)' is logically equivalent to what single gate?

Accepted Answer

A) nand 
B) nor 
C) and 
D) or 
A) nand 
B) nor 
C) and 
D) or

A NAND based S'-R' latch can be converted into S-R latch by placing

Which of the following expressions is in the sum-of-products form?

How many types of flip-flops are?

The S-R flip flop consist of

When both inputs of a J-K flip-flop cycle, the output will

One example of the use of an S-R flip-flop is as

What is the hold condition of a flip-flop?

Each "0" entry in a K-map square represents:

Which of the examples below expresses the commutative law of multiplication?

The systematic reduction of logic circuits is accomplished by:

One example of the use of an S-R flip-flop is as

Looping on a K-map always results in the elimination of

Each "1" entry in a K-map square represents:

A TTL gate may operate inadvertently as an

When is a flip-flop said to be transparent?

The difference between a flip-flop & latch is

Which statement below best describes a Karnaugh map?

What is one disadvantage of an S-R flip-flop?

In a NAND based S'-R' latch, if S'=1 & R'=1 then the state of the latch is

The Boolean expression Y = (AB)' is logically equivalent to what single gate?

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Flip-Flops, Adders, and Subtractors

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Flip-Flops, Shift Operators, and Finite State Machines Fsm in VHDL

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters

Exam 4: TTL Circuits, Karnaugh Maps, and Flip-Flops

A NAND based S'-R' latch can be converted into S-R latch by placing

Which of the following expressions is in the sum-of-products form?

How many types of flip-flops are?

The S-R flip flop consist of

When both inputs of a J-K flip-flop cycle, the output will

One example of the use of an S-R flip-flop is as

What is the hold condition of a flip-flop?

Each "0" entry in a K-map square represents:

Which of the examples below expresses the commutative law of multiplication?

The systematic reduction of logic circuits is accomplished by:

One example of the use of an S-R flip-flop is as

Looping on a K-map always results in the elimination of

Each "1" entry in a K-map square represents:

A TTL gate may operate inadvertently as an

When is a flip-flop said to be transparent?

The difference between a flip-flop & latch is

Which statement below best describes a Karnaugh map?

What is one disadvantage of an S-R flip-flop?

In a NAND based S'-R' latch, if S'=1 & R'=1 then the state of the latch is

The Boolean expression Y = (AB)' is logically equivalent to what single gate?

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Flip-Flops, Adders, and Subtractors

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Flip-Flops, Shift Operators, and Finite State Machines Fsm in VHDL

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters