Question 1

If A and B are the inputs of a half adder, the sum is given by

Accepted Answer

A) a and b 
B) a or b 
C) a xor b 
D) a ex-nor b 
A) a and b 
B) a or b 
C) a xor b 
D) a ex-nor b

Question 2

If A, B and C are the inputs of a full adder then the sum is given by

Accepted Answer

A) a and b and c 
B) a or b and c 
C) a xor b xor c 
D) a or b or c 
A) a and b and c 
B) a or b and c 
C) a xor b xor c 
D) a or b or c

Question 3

Half-adders have a major limitation in that they cannot

Accepted Answer

A) accept a carry bit from a present stage 
B) accept a carry bit from a next stage 
C) accept a carry bit from a previous stage 
D) accept a carry bit from the following stages 
A) accept a carry bit from a present stage 
B) accept a carry bit from a next stage 
C) accept a carry bit from a previous stage 
D) accept a carry bit from the following stages

Question 4

The characteristic of J-K flip-flop is similar to

Accepted Answer

A) s-r flip-flop 
B) d flip-flop 
C) t flip-flop 
D) gated t flip-flop 
A) s-r flip-flop 
B) d flip-flop 
C) t flip-flop 
D) gated t flip-flop

If A and B are the inputs of a half adder, the sum is given by

If A, B and C are the inputs of a full adder then the sum is given by

Half-adders have a major limitation in that they cannot

The characteristic of J-K flip-flop is similar to

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

TTL Circuits, Karnaugh Maps, and Flip-Flops

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Flip-Flops, Shift Operators, and Finite State Machines Fsm in VHDL

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters

Exam 7: Flip-Flops, Adders, and Subtractors

If A and B are the inputs of a half adder, the sum is given by

If A, B and C are the inputs of a full adder then the sum is given by

Half-adders have a major limitation in that they cannot

The characteristic of J-K flip-flop is similar to

Digital Circuit Design and RTL Implementation

Understanding Diode-Transistor Logic DTL and Other Logic Families

CMOS, ECL, SCFL, Lvpecl, and TTL Logic Circuits

TTL Circuits, Karnaugh Maps, and Flip-Flops

Sequential Circuits and Logic Gat

Flip-Flops and Mosfets in IC Components

Registers, Shift Registers, and Adders

Exploring Concepts and Applications of Memory and Counters in Digital Electronics

Counters and Shift Registers

Proms and Memory Addressing

Binary Arithmetic and Multiplexers/Demultiplexers

Flip-Flops, Shift Operators, and Finite State Machines Fsm in VHDL

Shift Registers, Packages, and Combinational Circuits in VHDL

Filters