Question 1

The NAND gate is an example of combinational logic.

Accepted Answer

A) True 
 B)False  True

Question 2

Which figure below represents AND- OR logic?

Accepted Answer

A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)  
A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)  A

Question 3

-Which circuit in Figure 5- 3 represents the NAND implementation of an inverter?

Accepted Answer

A)  Figure (
A) . 
B)  Figure (
B) . 
C)  Figure (
C) . 
D)  Figure (
D) . 
A)  Figure (
A) . 
B)  Figure (
B) . 
C)  Figure (
C) . 
D)  Figure (
D) . C

Question 4

The Karnaugh map below represents the expression, X = ACD + AB(CD + BC).

Accepted Answer

A) True 
 B)False

Question 5

The NAND gate is referred to as a "universal" gate, because it_________.

Accepted Answer

A)  is used in all the countries of the world 
B)  can be found in almost all digital circuits 
C)  can be used to build all the other types of gates 
D)  was the first gate to be integrated 
A)  is used in all the countries of the world 
B)  can be found in almost all digital circuits 
C)  can be used to build all the other types of gates 
D)  was the first gate to be integrated

Question 6

How many gates, including inverters, are required to implement the equation,   as it is written?

Accepted Answer

A)  1 
B)  2 
C)  3 
D)  4 
A)  1 
B)  2 
C)  3 
D)  4

Question 7

-Based on the indications of probe C in Figure 5- 5, what, if anything, is wrong with the circuit?

Accepted Answer

A)  The gate appears to be working correctly. 
B)  Pin 6 on the right- hand IC is shorted to ground. 
C)  The gate being tested has not been connected to Vcc and ground. 
D)  Pin 5 on the right- hand IC appears to be open. 
A)  The gate appears to be working correctly. 
B)  Pin 6 on the right- hand IC is shorted to ground. 
C)  The gate being tested has not been connected to Vcc and ground. 
D)  Pin 5 on the right- hand IC appears to be open.

Question 8

-Which circuit in Figure 5- 4 represents the NOR implementation of an OR gate?

Accepted Answer

A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)  
A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)

Question 9

NOR gates can be used to construct AND gates.

Accepted Answer

A) True 
 B)False

Question 10

-Which circuit in Figure 5- 3 represents the NAND implementation of an AND- OR function?

Accepted Answer

A)  Figure (
A) . 
B)  Figure (
B) . 
C)  Figure (
C) . 
D)  Figure (
D) . 
A)  Figure (
A) . 
B)  Figure (
B) . 
C)  Figure (
C) . 
D)  Figure (
D) .

Question 11

Which of the figures is the correct NAND logic implementation of the expression,

Accepted Answer

A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)  
A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)

Question 12

-What type of logic circuit is represented by Figure 5- 1?

Accepted Answer

A)  XOR 
B)  XNAND 
C)  XAND 
D)  XNOR 
A)  XOR 
B)  XNAND 
C)  XAND 
D)  XNOR

Question 13

This circuit is an example of the implementation of AND- OR- INVERT logic.

Accepted Answer

A) True 
 B)False

Question 14

The output of a gate has an internal short. A current tracer will ________.

Accepted Answer

A)  be able to identify the defective load node 
B)  probably not be able to locate the problem 
C)  identify the defective gate 
D)  show whether the gate is shorted to Vcc or ground 
A)  be able to identify the defective load node 
B)  probably not be able to locate the problem 
C)  identify the defective gate 
D)  show whether the gate is shorted to Vcc or ground

Question 15

-Based on the indications of probe A in Figure 5- 5, what, if anything, is wrong with the circuit?

Accepted Answer

A)  The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem. 
B)  The output appears to be LOW, but is being pulsed by the pulser. 
C)  The output appears to be shorted to Vcc, but is being pulsed by the pulser. 
D)  Nothing appears to be wrong at that point. 
A)  The logic probe is unable to determine the state of the circuit at that point and is blinking to alert the technician to the problem. 
B)  The output appears to be LOW, but is being pulsed by the pulser. 
C)  The output appears to be shorted to Vcc, but is being pulsed by the pulser. 
D)  Nothing appears to be wrong at that point.

Question 16

How many gates, including inverters, are required to implement the equation,   after it is simplified using Boolean algebra?

Accepted Answer

A)  1 
B)  2 
C)  3 
D)  4 
A)  1 
B)  2 
C)  3 
D)  4

Question 17

-Which circuit in Figure 5- 4 represents the NOR implementation of an inverter?

Accepted Answer

A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)  
A)  Figure (
A)  
B)  Figure (
B)  
C)  Figure (
C)  
D)  Figure (
D)

Question 18

NAND gates cannot be used to construct NOR gates.

Accepted Answer

A) True 
 B)False

Question 19

What is the indication of a short to ground in the output of a driving gate?

Accepted Answer

A)  The affected node will be stuck in the HIGH state. 
B)  The node is stuck in the LOW state. 
C)  Only the output of the defective gate is affected. 
D)  There is a signal loss to all load gates. 
A)  The affected node will be stuck in the HIGH state. 
B)  The node is stuck in the LOW state. 
C)  Only the output of the defective gate is affected. 
D)  There is a signal loss to all load gates.

Question 20

When the inverted output of one gate is connected to the inverted input of another gate, __________.

Accepted Answer

A)  one inversion cancels the other and only a single inversion results 
B)  the inversions cancel 
C)  a double inversion occurs and the signal is inverted 
D)  all of the above are correct 
A)  one inversion cancels the other and only a single inversion results 
B)  the inversions cancel 
C)  a double inversion occurs and the signal is inverted 
D)  all of the above are correct

The NAND gate is an example of combinational logic.

Which figure below represents AND- OR logic?

-Which circuit in Figure 5- 3 represents the NAND implementation of an inverter?

The Karnaugh map below represents the expression, X = ACD + AB(CD + BC).

The NAND gate is referred to as a "universal" gate, because it_________.

How many gates, including inverters, are required to implement the equation, as it is written?

-Based on the indications of probe C in Figure 5- 5, what, if anything, is wrong with the circuit?

-Which circuit in Figure 5- 4 represents the NOR implementation of an OR gate?

NOR gates can be used to construct AND gates.

-Which circuit in Figure 5- 3 represents the NAND implementation of an AND- OR function?

Which of the figures is the correct NAND logic implementation of the expression,

-What type of logic circuit is represented by Figure 5- 1?

This circuit is an example of the implementation of AND- OR- INVERT logic.

The output of a gate has an internal short. A current tracer will ________.

-Based on the indications of probe A in Figure 5- 5, what, if anything, is wrong with the circuit?

How many gates, including inverters, are required to implement the equation, after it is simplified using Boolean algebra?

-Which circuit in Figure 5- 4 represents the NOR implementation of an inverter?

NAND gates cannot be used to construct NOR gates.

What is the indication of a short to ground in the output of a driving gate?

When the inverted output of one gate is connected to the inverted input of another gate, __________.

Introductory Concepts

Number Systems, Operations, and Codes

Logic Gates

Boolean Algebra and Logic Simplification

Functions of Combinational Logic

Latches, Flip-Flops, and Timers

Shift Registers

Counters

Programmable Logic

Data Storage

Signal Conversion and Processing

Data Transmission

Data Processing and Control

Integrated Circuit Technologies

Filters

Exam 5: Combinational Logic Analysis

The NAND gate is an example of combinational logic.

Which figure below represents AND- OR logic?

-Which circuit in Figure 5- 3 represents the NAND implementation of an inverter?

The Karnaugh map below represents the expression, X = ACD + AB(CD + BC).

The NAND gate is referred to as a "universal" gate, because it_________.

How many gates, including inverters, are required to implement the equation, as it is written?

-Based on the indications of probe C in Figure 5- 5, what, if anything, is wrong with the circuit?

-Which circuit in Figure 5- 4 represents the NOR implementation of an OR gate?

NOR gates can be used to construct AND gates.

-Which circuit in Figure 5- 3 represents the NAND implementation of an AND- OR function?

Which of the figures is the correct NAND logic implementation of the expression,

-What type of logic circuit is represented by Figure 5- 1?

This circuit is an example of the implementation of AND- OR- INVERT logic.

The output of a gate has an internal short. A current tracer will ________.

-Based on the indications of probe A in Figure 5- 5, what, if anything, is wrong with the circuit?

How many gates, including inverters, are required to implement the equation, after it is simplified using Boolean algebra?

-Which circuit in Figure 5- 4 represents the NOR implementation of an inverter?

NAND gates cannot be used to construct NOR gates.

What is the indication of a short to ground in the output of a driving gate?

When the inverted output of one gate is connected to the inverted input of another gate, __________.

Introductory Concepts

Number Systems, Operations, and Codes

Logic Gates

Boolean Algebra and Logic Simplification

Functions of Combinational Logic

Latches, Flip-Flops, and Timers

Shift Registers

Counters

Programmable Logic

Data Storage

Signal Conversion and Processing

Data Transmission

Data Processing and Control

Integrated Circuit Technologies

Filters