Exam 16: Parallelism and Superscalar Processors

_________ is a measure of the ability of the processor to take advantage of instruction-level parallelism.

The situation where the second instruction needs data produced by the first instruction to execute is referred to as __________.

Register renaming eliminates antidependencies and output dependencies.

Instead of the first instruction producing a value that the second instruction uses,with ___________ the second instruction destroys a value that the first instruction uses.

The simplest instruction issue policy is to issue instructions in the exact order that would be achieved by sequential execution (in- order issue)and to write results in that same order (in-order completion).

________ indicates whether this micro-op is scheduled for execution,has been dispatched for execution,or has completed execution and is ready for retirement.

Superscalar instruction issue policies are grouped into the following categories: in-order issue with in-order completion,out-of-order issue with out-of-order completion,and ____________.

The ________ protects critical data used by the operating system from user applications,separating processing tasks by disallowing access to each other's data,disabling access to memory regions,allowing memory regions to be defined as read-only,and detecting unexpected memory accesses that could potentially break the system.

The reorder buffer is temporary storage for results completed out of order that are then committed to the register file in program order.

Committing or _________ the instruction is when instructions are conceptually put back into sequential order and their results are recorded.

The schedulers are responsible for retrieving micro-ops from the micro-op queues and dispatching these for execution.

With ____________ any number of instructions may be in the execution stage at any one time,up to the maximum degree of machine parallelism across all functional units.

True data dependency is also called flow dependency or read after write (RAW)dependency.

__________ exists when instructions in a sequence are independent and thus can be executed in parallel by overlapping.

The ________ introduced a full-blown superscalar design with out-of-order execution.

In the operation of the Intel Core each instruction is translated into one or more fixed-length RISC instructions known as _________.

________ refers to the process of initiating instruction execution in the processor's functional units.

_________ is determined by the number of instructions that can be fetched and executed at the same time and by the speed and sophistication of the mechanisms that the processor uses to find independent instructions.

Machine parallelism exists when instructions in a sequence are independent and thus can be executed in parallel by overlapping.

A ________ implementation of a processor architecture is one in which common instructions can be initiated simultaneously and executed independently.